1. Field of the invention
This invention relates to a semiconductor device, more particularly, a semiconductor device having a ferroelectric capacitor.
2. Description of the Earlier Technology
Ferroelectric memories formed by ferroelectric capacitors are known as nonvolatile semiconductor memories. FIG. 10 shows a part of a ferroelectric memory including a memory cell 11 in a circuit diagram. The memory cell 11 comprises a ferroelectric storage capacitor C11. One end of the ferroelectric capacitor C11 is electrically connected in series with a ferroelectric capacitor Cb for load via a selector transistor TR11 and a bit line /BL1.
The bit line /BL1 is connected to one end of a sense amplifier AMP1, the other end of which is connected to a reference-cell preset circuit portion RC via a bit line BL1.
In the reference-cell preset circuit portion RC, one end of a reference ferroelectric capacitor Cr is electrically connected with a ferroelectric capacitor Cc for load via a transistor TRC and the bit line BL1.
To read data out of the memory cell M11, after electricity is discharged from the capacitor Cb for load, a read-out voltage is applied to the both ends of a section in which the ferroelectric capacitor C11 and the capacitor Cb for load are connected in series. Then, a potential Vt occurs in the bit line /BL1 according to a polarity state (or data) of the ferroelectric capacitor C11.
After electricity is discharged from the capacitor Cc for load a voltage for generating a threshold voltage is applied to both ends of a section in which the ferroelectric capacitor Cr and the capacitor Cc for load are connected in series. Then, a predetermined voltage Vref occurs in the bit line BL1.
A sense amplifier AMP1 makes a comparison of value between the reference voltage Vref and the above-mentioned potential Vt and thereby can know data.
As described above, in addition to the ferroelectric capacitor C11, the capacitors Cb and Cc and the reference capacitor Cr are all made using ferroelectric. That enables all capacitors which is necessary to obtain both the reference voltage Vref and the potential Vt to be made at the same manufacturing step. This manufacturing technology can decrease variation of electric property for each of the capacitors due to difference between manufacturing steps. That is, it can prevent the reference voltage Vref and the potential Vt from changing according to differences between manufacturing steps.
There are, however, the following problems in the described-above ferroelectric memory. Since the ferroelectric storage capacitor C11 is to have remanence of different directions for the kinds of data, the direction of remanence is shifted when data is rewritten into the ferroelectric capacitor C11. Therefore, the ferroelectric capacitor has relative difficulties in getting a bad electric property (which is called as "imprint effect") due to the remanence.
In the capacitor Cb or Cc for load or the reference capacitor Cr, however, a voltage of the same direction (or polarity) is applied thereto when data is written into the ferroelectric capacitor C11. Therefore, these capacitors always have remanence of the same direction even though data is rewritten into the ferroelectric capacitor C11. That leads to a bad electric property due to the remanence of ferroelectric in long time periods. On getting the bad electric property, distortion occurs in each of the hysteresis loops of these capacitors (see FIG. 9).
When distortion occurs in the hysteresis loop of the capacitor Cb for load, the described-above potential Vt changes. Also, when distortion occurs in the hysteresis loop of the capacitor Cc for load or the reference ferroelectric capacitor Cr, the described-above reference voltage changes. In this case, data can not be read out correctly. That is, as time passes the reliability in reading data out of the memory cell decreases.